File indexing completed on 2025-08-03 08:20:40
0001 #include "packet_hbd_fpgashort.h"
0002
0003
0004 #define HBD_MAX_MODULES 4
0005
0006
0007 Packet_hbd_fpgashort::Packet_hbd_fpgashort(PACKET_ptr data)
0008 : Packet_w4 (data)
0009 {
0010 nr_modules = 0;
0011 HBD_NSAMPLES = 24;
0012 hbd_parity=0;
0013 }
0014
0015 int *Packet_hbd_fpgashort::decode ( int *nwout)
0016 {
0017
0018 int *k;
0019
0020 int dlength = getDataLength();
0021
0022
0023 k = (int *) findPacketDataStart(packet);
0024 if (k == 0)
0025 {
0026 *nwout = 0;
0027 return 0;
0028 }
0029
0030
0031 int *iarr = new int[ 48 * HBD_NSAMPLES * HBD_MAX_MODULES ];
0032
0033
0034 decoded_data2 = new int[ HBD_MAX_MODULES ];
0035 decoded_data3 = new int[ HBD_MAX_MODULES ];
0036 decoded_data4 = new int[ HBD_MAX_MODULES ];
0037
0038 memset( iarr, 0, 48*HBD_NSAMPLES*sizeof(int)*HBD_MAX_MODULES);
0039 memset( decoded_data2, 0, 4*HBD_MAX_MODULES);
0040 memset( decoded_data3, 0, 4*HBD_MAX_MODULES);
0041 memset( decoded_data4, 0, 4*HBD_MAX_MODULES);
0042
0043 int pos = 0;
0044 int log_mod_nr;
0045 int l1_trig_nr;
0046 int beam_clock;
0047 int phys_mod_nr;
0048
0049 while ( pos < dlength - 10)
0050 {
0051
0052
0053
0054
0055 if ( (k[pos] & 0xF0000000) == 0xF0000000 )
0056 {
0057 nr_modules++;
0058
0059
0060
0061 log_mod_nr = k[pos] & 0xf;
0062 l1_trig_nr = k[pos+1] & 0xfff;
0063 beam_clock = k[pos+2] & 0xfff;
0064 phys_mod_nr = k[pos+3] & 0x1f;
0065
0066
0067
0068
0069
0070
0071
0072 if ( log_mod_nr >= HBD_MAX_MODULES)
0073 {
0074 std::cout << __FILE__ << " " << __LINE__
0075 << " wrong logical module number " << log_mod_nr << std::endl;
0076 }
0077 else
0078 {
0079 decoded_data2[log_mod_nr] = l1_trig_nr;
0080 decoded_data3[log_mod_nr] = beam_clock;
0081 decoded_data4[log_mod_nr] = phys_mod_nr;
0082 }
0083 pos += 4;
0084 }
0085 else
0086 {
0087 delete [] iarr;
0088 delete [] decoded_data2;
0089 delete [] decoded_data3;
0090 delete [] decoded_data4;
0091 decoded_data2 = 0;
0092 decoded_data3 = 0;
0093 decoded_data4 = 0;
0094 *nwout = 0;
0095 return 0;
0096 }
0097
0098
0099
0100 while ( (k[pos] & 0xF0000000) == 0xE0000000 )
0101 {
0102
0103 int f_channr = (( k[pos] >>16 ) & 0x3f);
0104 pos++;
0105 int slot = 48*HBD_NSAMPLES*log_mod_nr + HBD_NSAMPLES*f_channr ;
0106
0107
0108 while ( (k[pos] & 0xC0000000) == 0x40000000 )
0109 {
0110 int adc0 = ( k[pos] & 0xfff);
0111 iarr[slot++] = adc0;
0112 int adc1 = ( (k[pos]>>16) & 0xfff);
0113 iarr[slot++] = adc1;
0114 pos++;
0115
0116
0117
0118
0119
0120
0121
0122
0123 }
0124
0125
0126 }
0127
0128 }
0129 if ( (k[pos] & 0xE0000000) == 0xA0000000 )
0130 {
0131
0132 hbd_parity = (k[pos] & 0xfff);
0133 pos++;
0134 }
0135
0136
0137 *nwout = 48 * HBD_NSAMPLES * HBD_MAX_MODULES;
0138 return iarr;
0139 }
0140
0141
0142
0143 int Packet_hbd_fpgashort::iValue(const int ich, const int is)
0144 {
0145 if (decoded_data1 == NULL )
0146 {
0147 if ( (decoded_data1 = decode(&data1_length))==NULL)
0148 return 0;
0149 }
0150
0151 if (ich < 0 || ich >= nr_modules *48) return 0;
0152
0153 if ( is == 100) return ( iValue(ich,0) + iValue(ich,1));
0154 if ( is == 101) return ( iValue(ich,4));
0155 if ( is == 102) return ( iValue(ich,10) + iValue(ich,11));
0156
0157 if (is < 0 || is >= HBD_NSAMPLES) return 0;
0158
0159 return decoded_data1[ich*HBD_NSAMPLES + is];
0160 }
0161
0162
0163
0164
0165 int Packet_hbd_fpgashort::iValue(const int ich, const char *what)
0166 {
0167
0168
0169
0170
0171 if (strcmp(what,"TRIGGER") == 0)
0172 {
0173 if (decoded_data1 == NULL )
0174 {
0175 if ( (decoded_data1 = decode(&data1_length))==NULL)
0176 return 0;
0177 }
0178 if (ich < 0 || ich >= nr_modules) return 0;
0179
0180 return decoded_data2[ich];
0181 }
0182
0183 else if (strcmp(what,"BCLK") == 0)
0184 {
0185
0186 if (decoded_data1 == NULL )
0187 {
0188 if ( (decoded_data1 = decode(&data1_length))==NULL)
0189 return 0;
0190 }
0191 if (ich < 0 || ich >= HBD_MAX_MODULES) return 0;
0192
0193 return decoded_data3[ich];
0194 }
0195
0196 else if (strcmp(what,"NRSAMPLES") == 0)
0197 {
0198 return HBD_NSAMPLES;
0199 }
0200
0201 else if (strcmp(what,"MODULEID") == 0)
0202 {
0203
0204 if (decoded_data1 == NULL )
0205 {
0206 if ( (decoded_data1 = decode(&data1_length))==NULL)
0207 return 0;
0208 }
0209 if (ich < 0 || ich >= HBD_MAX_MODULES) return 0;
0210
0211 return decoded_data4[ich];
0212 }
0213
0214 else if (strcmp(what,"NRMODULES") == 0)
0215 {
0216
0217 if (decoded_data1 == NULL )
0218 {
0219 if ( (decoded_data1 = decode(&data1_length))==NULL)
0220 return 0;
0221 }
0222
0223 return nr_modules;
0224 }
0225
0226 else if (strcmp(what,"PARITY") == 0)
0227 {
0228
0229 if (decoded_data1 == NULL )
0230 {
0231 if ( (decoded_data1 = decode(&data1_length))==NULL)
0232 return 0;
0233 }
0234 return hbd_parity;
0235
0236 }
0237
0238 return 0;
0239 }
0240
0241
0242
0243
0244
0245
0246 void Packet_hbd_fpgashort::dump ( OSTREAM &os)
0247 {
0248 int i,j;
0249
0250 this->identify(os);
0251
0252 os << " Number of Modules: " << SETW(8) << iValue(0,"NRMODULES") << " Parity: " << SETW(8) << std::hex << iValue(0,"PARITY") << std::dec << std::endl;
0253 os << " Number of Samples: " << SETW(8) << iValue(0,"NRSAMPLES") << std::endl;
0254
0255
0256 for (i = 0; i < iValue(0,"NRMODULES"); i++)
0257 {
0258 os << " Module # " << std::setw(2) << i
0259 << " Trigger: " << SETW(8) << iValue(i,"TRIGGER")
0260 << " Beam Clock: " << SETW(8) << iValue(i,"BCLK")
0261 << " Module Id: " << SETW(8) << iValue(i,"MODULEID")
0262 << std::endl;
0263 }
0264
0265 for (i = 0; i < iValue(0,"NRMODULES") * 48 ; i++)
0266 {
0267 os << std::setw(5) << i << " | " ;
0268 for ( j = 0; j < HBD_NSAMPLES; j++)
0269 {
0270 os << std::setw(5) << iValue(i,j);
0271 }
0272 os << " ";
0273
0274
0275
0276
0277
0278
0279
0280 os << std::endl;
0281 }
0282 dumpErrorBlock(os);
0283 dumpDebugBlock(os);
0284
0285 }